Reid on Reliability: Stacked, Staggered Microvias and Glass Lock


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This month we are going to open our discussion on stacked and staggered microvias and the concept of glass lock.

To begin, as a means of distinguishing simple interconnect structures from multiple structures (where two or more interconnect structures are placed on top of one another), we will call the former structures simple and the latter compound.

Compound structures will include structures with microvias on top of microvias and microvias on top of buried vias. This is a structure that requires that the “buried” via have a cap in order to have electrical continuity. This definition excludes those structures that are off set and do not require that the next buried via have a cap that would be part of the electrical circuit in order to function.

This means stacked microvias are considered compound structures while staggered microvias would be considered simple structures. I make this differentiation between staggered and stacked microvias because the failure modes, and consequently reliability, are so different.

Figure 1. Staggered vs. stacked microvias.

The staggered microvias tend to float on a bed of dielectric and act like individual microvias with pad rotation down. The stacked microvias, when stacked four high or greater, or stacked microvias attached to a long buried microvia, tend to act like plated through-holes (PTH) where the pad rotation is upward.

In the animation of the cross-section shown in Figure 2, going through the thermal excursion of about 260°C, note that the single, floating microvias have pad rotation downward while the stacked microvias, in the right side of the animation, act like a PTH in that it has pad rotation upward.

Figure 2. Still shot of animation showing stacked microvias. Click here to view the animation.

Notice in the animation that the PTHs, core buried vias and stacked microvias on buried vias act like “rivets” restraining the z-axis expansion of the circuit board. The viscoelastic properties of the dielectric are such as to stress-relieve between the PTH, core via and stacked via structures. The dielectric pushes out between these constraining “rivets,” allowing stress relief of the dielectric. The dielectric material bows out between the PTH and stacked microvia the same way a pillow with buttons will push out between the buttons. While the outer layer microvia and the short buried via tend to float on the dielectric between the “rivets,” it is almost as if there is a hydraulic beneath pushing up on the base of the single microvia.

Pad rotation is significant in the amount of the pad rotation and the direction it occurs. The outer layers, particularly structures on the surface, have the largest pad rotation, while the center of the boards has no pad rotation. The pad rotation is greater on thicker boards than thinner boards. The direction is downward for those structures that are not associated with a long buried via or stacked vias, and upwards for those that are associated with a long buried via or a stack of four or more microvias. On HDI applications where the board is thick, say .110” or greater, the pad rotation is great enough to be significant, causing – among over things – corner cracks particularly in copper-filled microvias.

Figure 3. Staggered microvia with downward pad rotation.

Figure 4. Stacked microvias with upward pad rotation.

We have to consider how the microvia is stacked. The stacked microvia or buried via must have a cap on all buried vias. The outer-layer microvias do not need a cap – they may be open, but the buried microvias need a cap that is part of the electrical circuit.

Consider a standalone microvia: It does not need a cap to maintain electrical continuity. On a standalone microvia, the electrical current comes in the clad copper and the copper wrap and proceeds down the barrel of the interconnection. The cap on a standalone buried or microvia is not part of the circuit and can be completely removed and no significant change in resistance can occur. This makes stacked microvias vulnerable to cap problems where staggered and stand alone interconnect structures are not.

This year we tested staggered and stacked microvias. In this case the stacked and staggered microvias were in the same coupon. This means that the staggered and the stacked microvia coupon had the same lamination, the same hole ablation the same hole preparation all things were the same except the configuration. The two configurations were within 1 mm (.040”) of each other. Both staggered and stacked microvia failed for separation of the base of the microvia from the target pad.

The staggered microvias were two orders of magnitude more robust than the stacked microvias. It is a significant finding for high-reliability applications that staggered microvias are orders of magnitude more robust than stacked microvias. Although microvias are the most robust of the interconnect structures, stacked microvias are not as robust as staggered microvias. It would be prudent to have the producer of stacked microvias demonstrate capability in making robust simple microvias before they go forward with stacked microvia configurations.

The next problem that needs to be considered is “glass lock” and “glass crush.” Consider that the construction of this compound structure requires a .1 mm (.004”) dielectric between each layer. If we measure the dielectric thickness from the target pad to the bottom of the copper above, we see a great deal of variation. The copper wrap and the copper cap can significantly reduce the spacing between the clad copper and the top of the microvia. In this case all other copper thickness remains the same.

Figure 5. Dielectric spacing of .023 mm (.0009”).

Figure 6. Dielectric spacing on layer 2 of .01 mm (.0004”).

The major concern is that the two plys of glass have to be squeezed between .023 mm (.0009”) of space on layers 1 and 2 but the same plys have to fit between .01 mm (.0004”) on layers 2 and 3. This .01 mm (.0004”) of space is probably too small, causing the glass to be crushed during lamination. This is a path for CAF on areas where there are ground planes and traces without microvias.

Figure 7. Glass lock layer 1/2, glass crush layer 2/3.

The argument is made that there are no potential differences between layer 1, 2, 3, and 4 on the stacked microvia, so that even if there is an electrical path created by a crack in the glass, it will make no difference. However, consider the traces on another area on the board, where there are no microvias but there are four layers of copper on layers 1, 2, 3, and 4. The dielectric between those layers could have glass that is cracked. Layers 1, 2, 3, and 4 may have a difference in potential between the layers. Those areas will be subject to the same spacing problems – glass crack and the possibility of CAF.

Paul Reid is a program coordinator at PWB Interconnect Solutions Inc., Ottawa, where his duties include reliability testing, failure analysis material analysis and PWB reliability consulting. To contact Paul, click here.

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