The Plating Forum: The IPC Surface Finish Specifications

Specifications are reference documents to be called out by OEM board designers in specifying the attributes of a surface finish. Designers may take exception to one or more items in the specification to ensure that the product meets the requirements of its intended use. The term “AAUBUS” (As Agreed Upon Between User and Supplier) is part of any specification. 

Specifications are consensus documents. They are agreed upon by a panel of interested industry participants composed of end users (OEMs), manufacturers, assemblers, and suppliers. If there is consensus, then the committee documents it in a draft specification for peer review. 

In cases where no consensus is readily arrived at, the committee undergoes its own testing in what is commonly referred to as a “Round Robin” (RR) study. In a RR investigation, an agreed-upon test vehicle (TV) is designed and manufactured. TVs are then sent around to the different suppliers who deposit the agreed upon thicknesses to be investigated. The TVs are collected, and the deposit thicknesses are verified and documented. The TVs are then coded and sent around again to the different testing sites that test for the desired attributes like soldering, contacting, and wire bonding capabilities of the different finish thicknesses. The data is then collected, sorted out, and documented. At this point, a new attempt at consensus is made and, when achieved, the thickness specification is set, and the specification is drafted. 

The “Draft” is posted for “Peer Review.” Any IPC member can review the document and suggest technical or editorial changes. All comments are then reviewed, and all issues are resolved before the “Final Draft” is issued. At this time, the IPC takes on the task of publishing the document in its final format. 

The IPC Plating Subcommittee 4-14 was active from 2001–2019. The committee was co-chaired by George Milad of Uyemura International Corp., and Gerard O’Brien, president and owner of ST and S Group, a consulting and testing facility. The IPC liaison was Tom Newton. The committee had an extensive member list composed of OEMs, assembly manufacturers, suppliers, labs, and consultants. Members participated on and off in conference calls that they were interested in and as their time allowed. Not all members were on all conference calls. Below is a listing of participant companies. 

OEM and CM: Lockheed Martin, Raytheon, Oracle, Adtran, Rockwell Collins, Hewlett-Packard, Alcatel-Lucent, Dell, St. Jude Medical, Delphi, Schneider Electric, Continental Corporation, Panasonic, IBM, Northrop Grumman, BAE Systems, Honeywell, Boeing, Tyco Electronics, Peregrine Semiconductor, Space Systems /Loral, Amonix, Celestica, Winstron. 

PCB manufacturing: TTM, I3, Molex, Bergquist, Superior Processing, Alternate Final Finishing. 

Suppliers: MacDermid, Uyemura, Atotech, Technic Inc, MEC, ECI Technology, Kulick & Sofa, Metalor, Fischer Technology, Hesse-Mechatronics. 

Labs and Consultants: ST and S Group, Sandia Laboratories, DFR Solutions, TAS Consulting. 

The committee met every other week for a one-hour conference call. Those in attendance made decisions. The minutes of the meeting were documented and distributed to the members. 

Since its inception, the IPC Plating Subcommittee 4-14 has issued the following:

  • IPC-4552 ENIG Specification 2002
  • IPC-4553 Immersion Silver specification 2005
  • IPC-4554 Immersion Tin Specification 2007
  • IPC-4553A Revised Immersion Silver 2009
  • IPC-4554 Amended Tin Specification 2011
  • IPC-4552 Amended ENIG Specification 2012
  • IPC-4556 ENEPIG Specification 2013
  • IPC-4556 ENEPIG Amended Specification 2015
  • IPC-4552 Rev A ENIG Specification 2017
  • IPC-4552 Rev B ENIG Specification 2021 

The ENIG IPC-4552 Specification was issued in 2002. No lead-free (LF) solder was in use at that time.

For thickness, IPC-4552 stated:

  • The EN thickness shall be 3 to 6 µm (118.1 to 236.2 µin)
  • The minimum IG thickness shall be 0.05 (1.97 µin) at four sigma (standard deviation) below the mean. The typical range is 0.075 to 0.125 µm (2.955 to 4.925 µin)
  • No upper limit was set 

Immersion Silver IPC-4553 issued in 2005. In 2005, there were two distinct types of commercialized immersion silver with different thickness recommendations, referred to as “Thin” and “Thick.” Each required its own thickness specification. 

The initial 4553 specification stated the following for thickness of deposit.

Two thickness specification:

  • Thin silver: 0.05 µm (2 µ”) minimum at -2σ from process mean as measured on a pad of area 2.25² µm (3600² mils).Typical value 0.07 µm (3 µ”) to 0.1 2µm (5 µ”)
  • Thick silver: 0.12 µm (5 µ”) minimum at -4σ from process mean as measured on a pad of area 2.25 µm (3600² mils). Typical value of 0.2 µm (8 µ”) to 0.3 µm (12 µ”). 

The immersion tin specification was issued in 2007. For immersion tin, the committee specified a lower limit for thickness. The relatively thick value of 1 micron was chosen to ensure that enough virgin tin would be available at the surface for soldering after storage. It is well understood that tin forms an intermetallic (IMC) layer with the underlying copper, and that this layer continues to grow in thickness over time. 

The immersion tin thickness will be: 1.0 µm (40 µ”) minimum at -4σ from process mean as measured on a pad of area 2.25² µm (3600² mils). Typical value of 1.15 µm (46 µ”) to 1.3 µm (52 µ”). 

The Immersion Tin Specification IPC-4554 was amended in 2011. The amendment addressed solderability testing and specified the allowed stress testing conditions for the deposit and the type of fluxes to be used for both tin-lead and LF (lead-free) testing. 

Specification IPC-4555 for OSP (organic solderabilty preservative) was attempted in 2008. After more than one year of struggling with Specification IPC-4555, nothing was specified. There was no consensus arrived at. This was mostly due to the wide assortment of organic products that were used for solderability preservation for the various applications, each with its own recommended thickness values. 

In 2009, the Immersion Silver Specification IPC-4553 was revised and Immersion Silver IPC-4553A was issued in 2009. The original specification with a thin and a thick specification was confusing and hard to understand. In addition, the industry settled on one type of immersion silver, and it necessitated the issuance of a single thickness specification, with the addition of an upper spec limit: IPC-4553A specified a single thickness with an upper limit: 

  • 0.12 µm [5 µin] minimum to 0.4 µm [16 μin] maximum at ± 4σ from process mean as measured on a pad area approximately 2.25 mm², example; 1.5 mm X 1.5 mm (60 X 60 mil). Typical value between 0.2 µm [8 µin] to 0.3 µm [12 µin].
  • An upper limit was set. 

In 2012, IPC-4552 ENIG specification was amended to reduce the lower limit of immersion gold thickness. The lower limit for gold thickness was reduced from 0.05 µm to 0.04 µm (1.6 µin) with restrictions:

  • Limited time from manufacturing to assembly
  • Demonstrate the consistency of the plating process
  • Ability to measure low gold thickness 

IPC-4556 ENEPIG, 2013
The document produced is very comprehensive and includes a wealth of information from the RR studies that were conducted. The appendix contains a documentation of these studies, each authored by the person who conducted the testing. It also includes a section on the proper methods of equipment setup for a reliable measurement of very thin layers of metal deposits. 

Appendices 1–9

  1. Chemical Definitions and Process Sequence; Martin Bayes, Dow Chemical Company
  2. Round Robin Test Summary; George Milad, Uyemura International Corporation
  3. ENEPIG PWB Surface Finish XRF Round Robin Testing; Gerard O’Brien, S T and S Group.
  4. Factors Affecting Measurement Accuracy of ENEPIG Coatings by XRF; Frank Ferrandino, Calmetrics Inc.
  5. ENEPIG PWB Surface Finish Wetting Balance Testing; Gerard O’Brien, S T and S Group.
  6. Solder Spread Testing; Brian Madsen, Continental
  7. ENEPIG PWB Surface Finish Shear Test Project; Dave Hillman et al., Rockwell Collins Inc.
  8. Gold Wire Bonding; Stephen Meeks, St Jude Medical
  9. XRF Thickness Measurements of thin Au and Pd (ENEPIG): Recommendations for Instrumentation (Detectors) and their Limitations; Michael Haller, Fischer Technology 

The thickness specification for ENEPIG states:

  • Nickel: 3 to 6 µm [118.1 to 236.2 µin] at ± 4 sigma (standard deviations) from the mean
  • Palladium: 0.05 to 0.30 µm [2 to 12 µin] at ± 4 sigma (standard deviations) from the mean
  • Gold: minimum 0.030 µm [1.2 µin] at - 4 sigma (standard deviations) below the mean. No upper limit
  • All measurements to be taken on a nominal pad size of 1.5 mm x 1.5 mm [0.060 in x 0.060 in] or equivalent area 

The ENEPIG spec was amended in 2015. The amendment added an upper spec limit for immersion gold thickness. The thickness specification for ENEPIG states:

  • Nickel: 3 to 6 µm [118.1 to 236.2 µin] at ± 4 sigma (standard deviations) from the mean
  • Palladium: 0.05 to 0.30 µm [2 to 12 µin] at ± 4 sigma (standard deviations) from the mean
  • Gold: minimum 0.030 µm [1.2 µin] at -4 sigma (standard deviations) below the mean, maximum 0.07 µm [2.8 µin] 

If thicker gold is a design requirement, alternate gold deposition methods should be used, like:

  • Electroless gold
  • Reduction assisted immersion gold (RAIG)

All measurements to be taken on a nominal pad size of 1.5 mm x 1.5 mm [0.060 in x 0.060 in] or equivalent area. 

IPC-4552 Rev A, ENIG
The IPC-4552 A, revised ENIG specification was issued in 2017. The revision added a new lower limit for the immersion gold and for the first time specified an upper limit. IPC 4552A also addressed nickel corrosion and specified a “Corrosion Chart.” It also included a method for qualifying XRF equipment. 

The IPC-4552 A, ENIG Specification 2017:

  • The gold thickness shall be 1.6 (0.04 µm) to 4.0 µin (0.1 µm)
  • The upper limit of 4.0 µin must be strictly adhered to 

Corrosion Chart

Examine the corrosion spikes (if any) on the ENIG surface with an optical microscope at 1000X magnification, for frequency and depth. Three classification levels:

  • Level 1: Acceptable (less than 10 spike defects with a depth
  • Level 2: Disputable (spikes and depth > than Level 1 and < Level 3)
  • Level 3: Rejectable (>10 spike defects with >2 microns depth)

This was the first time that nickel corrosion was addressed and 4552A put a stake in the ground. It became clear that the way the corrosion evaluation was stated was problematic because it did not address frequency of occurrence. 

IPC-4552B was initiated in 2017 to address this deficiency. 4552B maintained the levels set in 4552A but added a method to quantify frequency of occurrence. 4552B introduced the term “Product Rating.” Seven specified locations in a plated through-hole, or five specified locations on a surface pad were examined for defects and their frequency of occurrence:

  1. Product rating 0: Acceptable; No corrosion defects.
  2. Product Rating 1: Acceptable; >60% of locations examined show Level 1 or less.
  3. Product Rating 2: (Acceptable, provided that solderability requirements are met); defects and frequency greater than Product Rating 1 but less than Product Rating.
  4. Product Rating 3: (Non-conforming;) More than 40% of locations showing Level 3 defects.

With the issuance of 4552A and 4552B there is now a way to quantify nickel corrosion. It is the author’s experience that the availability of a quantifying method is already paying great dividends, as the occurrence of the defect is already showing signs of coming under control. OEMs or buyers can now specify acceptable levels of corrosion and the manufacturer and supplier have to make the required changes to meet those levels. 

Presently, Subcommittee 4-14 is subdivided into subgroups, each with its own chair and vice-chair to address a single finish; for example, an OSP committee and an EPIG committee, etc.  

All committee work is voluntary from participation in meetings to manufacturing test vehicles and testing. Companies allow their employees to spend time in committee work and these companies must be credited for the successful issuance of IPC specification. The author urges all industry personnel to sign up and participate in committee work in the areas of their interest. You will learn a lot by communicating and collaborating with other members and more importantly, you will give back to the industry and to the community at large. 

This column originally appeared in the September 2021 issue of PCB007 Magazine.

George Milad is the national accounts manager for technology at Uyemura.

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2021

The Plating Forum: The IPC Surface Finish Specifications

10-06-2021

Specifications are reference documents to be called out by OEM board designers in specifying the attributes of a surface finish. Designers may take exception with one or more items in the specification to ensure that the product meets the requirements of its intended use. The term “AAUBUS” (As Agreed Upon Between User and Supplier) is part of any specification.

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The Plating Forum: An Overview of Surface Finishes

09-06-2021

Surface finishes’ research and development departments on the supplier side have been very busy coming up with new finishes to meet the everchanging demands of the electronics industry. Today, designers have wide variety of finishes to choose from. George Milad breaks it down.

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The Plating Forum: DIG—The Next Generation

06-16-2021

DIG stands for “Direct Immersion Gold.” The acronym is used to specify direct deposition of gold on copper as a surface finish. It is a metallic solderable finish. At assembly, DIG forms a Cu/Sn intermetallic with the gold layer dissipating into the bulk solder.

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The Plating Forum: RAIG (Reduction Assisted Immersion Gold) for Gold Surface Finishes

04-05-2021

RAIG was introduced a few years ago to meet the requirements of newer designs. Since its inception, more gold finishes are finding RAIG gold to be a viable alternative to standard immersion gold. RAIG gold is a mixed reaction bath that functions as an immersion gold and with the added reducing agent it also functions as an electroless (autocatalytic) bath.

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2020

The Plating Forum: Training for Plating Processes in the Electronics Industry

12-24-2020

Plating is a very old industry and has been studied for many generations. Its basic principles are well understood and documented. However, when it comes to the intricate details of plating a circuit board, there is so much to learn and apply. George Milad explains.

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The Plating Forum: Via Plating for PWBs

11-19-2020

Vias are an integral part of PWB design and manufacturing. They are the means by which different layers of a board are connected. George Milad addresses the electroplating of vias, including the three main types of vias: through-hole vias, buried vias, and blind vias.

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The Plating Forum: The Critical Role of Pretreatment for Plating

10-22-2020

Pretreatment is usually customized to the incoming substrate and the plated metal. George Milad explains how it is a critical step and must be completed before plating to achieve the desired adhesion and to enhance the quality of the deposited metal.

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The Plating Forum: Immersion Plating Reaction in Electronics Manufacturing

09-16-2020

Plating or metal deposition is a key component in the manufacturing of electronic packages (circuit boards and integrated circuits). Plating occurs when a metal ion in solution (electrolyte) is reduced to the metal. The reduction takes place when electrons are supplied to the ion. George Milad dedicates this column to the immersion reaction.

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The Plating Forum: Minimizing Signal Transmission Loss in High-Frequency Circuits

07-06-2020

All PCB materials have both conduction and dielectric RF signal losses. In this column, George Milad highlights resistive conduction losses by the copper layer used in the board.

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The Plating Forum: Can ‘Nickel Corrosion’ Occur in ENEPIG?

05-25-2020

Nickel palladium gold (ENEPIG) surface finish is being referred to as the “universal finish.” ENEPIG was also the answer to the nickel corrosion “black pad” encountered occasionally with electroless nickel/immersion gold (ENIG) deposits. In this column, George Milad answers the question, "Can 'nickel corrosion' occur in ENEPIG?"

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The Plating Forum: Eliminating Waste From Electrolytic Acid Copper Plating

03-15-2020

Acid copper plating in most shops is done in vertical plating tanks. Acid copper solutions are not dumped but are continuously used with occasional carbon treatment to remove organic build-up from the additives and from dry film leaching. George Milad explains.

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The Plating Forum: EPIG—A Nickel-free Surface Finish for Next-generation Products

01-11-2020

In recent years, electronic devices, such as smartphones and tablet PCs, have been miniaturized. Chip-size package (CSP) used inside the electronic devices have been miniaturized as well, and the spacing between the lines continues to diminish every year. Some of the latest packages have spacing as little as 15 µm or less. If electroless nickel electroless palladium immersion gold (ENEPIG) is used with an EN thickness of 5–6 µm, only 5 µm of spacing would be left, increasing the risk of shorts between the traces. George Milad explains.

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2019

The Plating Forum: New Developments in ENIG

12-08-2019

ENIG has been around the printed circuit industry for more than 25 years. George Milad provides an update and explains how although the occurrence of corrosion was recognized, a better understanding of the defect has led to a series of improvements over time.

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The Plating Forum: Update on IPC-4552 ENIG Specification Revisions

10-20-2019

George Milad's columns will cover PCB plating, IPC specifications, and more. In this debut installment, he gives us an update on the IPC-4552 ENIG specification, including Revision A and B.

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2014

The Plating Forum: Wire Bonding to ENIG

03-05-2014

The IPC-4552 ENIG specification was written in 2002, but the committee is currently updating and revising the document. The thickness of the immersion gold layer is being revised with the intent of reducing the minimum thickness from 2.0 µin to 1.6 µin. A series of studies were conducted to find out if this reduction is possible.

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The Plating Forum: ENIG and the Plating Process

01-07-2014

ENIG continues to gain market share due to its versatility in a wide range of component assembly methods including solder fusing, wave soldering, and wire bonding. The plating of ENIG is a complex multi-step process. Each process step is carefully designed and must be well understood and controlled to produce the desired end product. George Milad reports.

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2013

Acid Copper Plating for High Aspect Ratio and Via Fill

07-16-2013

To meet new specification requirements, board shops are forced to seek new and advanced processes in every department. Acid copper plating comes under heavy scrutiny, as it is the process that forms the traces and the through-hole connectivity that conveys the signal from end-to-end of the final device. George Milad, a new columnist for The PCB Magazine, explains.

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