10 Fundamental Rules of High-Speed PCB Design, Pt. 1
Over the years, I have focused on high-speed design, signal and power integrity, and EMC design techniques in a plethora of published technical articles—all of which have key points to consider and present a tremendous amount of information to absorb. In my next few columns, I will elaborate on ten of the most important considerations to embrace to achieve successful high-speed PCB designs that perform reliably to expectations.
Beyond Design: It’s a Material World
Years ago, when clock frequencies were low and signal rise times were slow, selecting a dielectric material for your PCB was not difficult; we all just used FR-4. And we didn’t really care about the properties of the materials. However, with today’s multi-gigabit designs and their extremely fast rise times and tight margins, precise material selection is crucial to the performance of the product. Materials used for the fabrication of the multilayer PCB absorb high frequencies and reduce edge rates, and that loss in the transmission lines is a major cause of signal integrity issues. But we are not all designing cutting-edge boards and sometimes we tend to over-specify requirements that can lead to inflated production costs.
Beyond Design: Crosstalk Margins
What is an acceptable level of crosstalk? That depends on the technology being used, and this level has changed quite dramatically over the years, going from TTL logic devices to today’s high-speed Gbps devices. In this month’s column, I will delve into the threshold of acceptable crosstalk and how to mitigate its impact on high-speed designs.
DDR3/4 Fly-by Topology Termination and Routing
DDR3/4 fly-by topology is similar to daisy chain or multi-drop topology, but it includes very short stubs to each memory device in the chain to reduce the reflections. The advantage of fly-by topology is that it supports higher-frequency operation and improves signal integrity and timing on heavily loaded signals. If you are employing high-frequency DDR4, then the bandwidth of the channel needs to be as high as possible. However, with today’s extremely fast edge rates, the sequencing of the stubs and the end termination, and the associate load, can make a measurable difference in signal quality. In this month’s column I will look at how best to route DDR3/4 fly-by topology.
Beyond Design: Common Symptoms of Common-Mode Radiation
Electromagnetic radiation from digital circuits can occur as either differential mode or common mode. Differential mode is typically equal and opposite and therefore any radiating fields will cancel. Conversely, common-mode radiation from two coupled conductors is identical. It does not cancel, but rather reinforces.
Beyond Design: A Review of HyperLynx DRC
There is an old saying, “You get what you pay for.” Does this mean that you should not expect too much from free software? After all, free software usually comes at a price: the results might be inaccurate, the software might be time-consuming to set up and use, and the tool might overlook issues that require a revision to mitigate. But HyperLynx DRC is the exception to the rule.
Beyond Design: AC/DC is Not Just a Rock Band
Positioned at our usual table at the local pub in Melbourne, Australia one night in 1972, the boys and I laughed as a school boy, guitarist Angus Young, set up equipment and tuned a guitar. We assumed he was one of the roadies, and were gobsmacked when AC/DC unexpectedly fired up. This month, I will discuss AC coupling (or is it DC blocking?) of high-speed serial links as my taste in music has matured over the years.
The Target Impedance Approach to PDN Design
Before you worry (or not) about post-layout PDN DC drop analysis, you first need to design an effective PDN pre-layout. Smart designers prevent problems before they arise, while others waste time and resources trying to fix the mess that they inadvertently created due to their lack of due diligence. Engineers and PCB designers need to visualize and understand how and where the currents flow.
Beyond Design: Ground Bounce
Ground bounce, or more precisely, supply bounce, is the voltage produced between two points in the power delivery path. It is fundamentally related to the total inductance of the current path and shared return paths and the instantaneous surge current delivered by the power supply. Once again, we find that inductance is the covert enemy of the high-speed PCB designer. It is the primary cause of simultaneous switching noise and electromagnetic radiation. As edge rates continue to increase, the impact of intrinsic electrical characteristics become more pronounced. In this month’s column, Barry Olney looks at supply bounce and how to minimise the impact on high-speed digital circuits.
Beyond Design: Signal Flight Time Variance in Multilayer PCBs
A transmission line does not carry the digital signal itself but rather, guides electromagnetic energy from one point to another. Signals travel at the same speed, given the same medium. However, the microstrip (outer layer) traces are embedded in a mélange of dielectric material, solder mask, and air. This lowers the effective dielectric constant and increases the propagation speed compared to that of stripline (inner layer) traces. This month, Barry Olney looks at the disparity in signal propagation in multilayer PCBs.