Trouble in Your Tank: Lead-free and the Fabrication Challenge, Part 1

A thick, high layer-count multilayer is one of the hardest printed circuit boards to adapt to lead-free assembly processes. The reason: Multilayers often have through-hole and hand-soldered components and require two or more reflow cycles. The higher reflow temperatures and slower wetting of lead-free solders place an enormous strain on the laminate and copper-plated hole barrel. In many cases, the boards cannot be assembled reliably, even with newer, higher thermal performance FR-4 materials.

One solution to this problem is to redesign the multilayer using current design rules and newer innovative fabrication technologies. Microvias offer a significant opportunity to reduce the layers and thicknesses of multilayers at a reasonable cost—all while improving electrical performance and density.

Consider blind vias, which are surface phenomena. To get maximum benefit from them, layer assignment for signal, ground, and power must be reviewed, and alternative constructions should be considered. Reducing the number of through-holes helps increase routing density and lower layer usage. You can achieve higher connector density and improve electrical performance by replacing through-hole connectors with surface-mount connectors.

These new multilayers are not only thinner, cheaper, and easier to design, but are less costly and suitable for lead-free assembly. I will discuss this and several enabling technologies, including laser-drilled microvias and new SMT connectors, in future columns.

The Issue
Tin/lead (Sn/Pb) alloys have been used for many years in the assembly of printed circuits. Eutectic Sn/Pb has a melting point of 183°C, and temperatures during assembly commonly reach 230°C. The primary alternatives to Sn/Pb are tin/silver/copper alloys. These alloys have melting points near 217°C, with typical peak assembly temperatures reaching 255°C to 260°C. This increase in assembly temperature, coupled with the possibility of multiple exposures to these temperatures, requires the base materials to have improved thermal stability.

Several technical papers have illustrated important data on the effect of lead-free assembly on base materials1,2. While there are many important properties to consider, there are a few that deserve special attention in light of current trends and the need for improved thermal performance. These include glass transition temperature (Tg), coefficient of thermal expansion (CTEs), and decomposition temperature (Td).

As the temperatures which printed circuits are exposed to increase, as in lead-free assembly processes, the Td of the material becomes a much more critical property to understand3. The Td is a measure of actual chemical and physical degradation of the resin system. This test uses thermogravimetric analysis, which measures the mass of a sample versus temperature. The Td is reported as the temperature at which 5% of the mass of the sample is lost to decomposition. Experience shows that the Td is a critical property, and appears to be at least as important, if not more important, than the glass transition temperature when planning for lead-free assembly conversion. While the definition of the Td uses a weight loss value of 5%, it is very important to understand the point at which 2-3% weight loss occurs, or where the onset of decomposition begins. In examining soldering reflow profiles, traditional Sn/Pb assembly processes can reach peak temperatures of 210°C to 245°C, with 230°C a very common value. In this range, most FR-4s do not exhibit significant levels of decomposition. However, if you examine the temperature range where lead-free assembly processes are operating, you can see that the traditional FR-4 materials exhibit a 2-3% weight loss. Severe levels of degradation can result from multiple exposures to these temperatures. This problem increases when there are 20-plus layers, resulting in thicker boards, and many are power or ground planes.

There are two primary failure mechanisms for printed wiring boards. Failures are mainly due to thermal or mechanical excursions. Plated through-hole (PTH) failures are the predominant source of PCB failures in service and predicting them is the primary goal of PCB testing at elevated temperatures. PTH reliability testing should simulate the thermal excursions of a PTH throughout its life. Generally, the most severe thermal cycles are experienced during assembly and rework. With that said, the materials that make up the board construction are thus critical to PTH reliability. As more boards are subjected to the higher temperatures required for lead-free assembly, layer counts, Tg, and Td must be considered.

The glass transition temperatures range from 125°C to 170°C (and somewhat higher for select resin materials). These temperature ranges may not be sufficient for most high temperature and harsh environment applications. Epoxy-based materials with Tg greater than 170°C, and polyimide resins with higher Tg (over 200°C), are indicated for long-term thermal resistance, especially in harsh use environments. These materials are effective for PTH life and high-performance multilayer PCBs with high layer counts. There are significant consequences for high layer count multilayers. This and the move to microvias will be discussed in next month’s column.

References 

  1. “Different Curing System Can Improve Laminate Performance,” by Christos Chrisafides, The Board Authority-Live, June 2004.
  2. “How to Get Started in HDI With Microvias,” by Happy Holden, CircuiTree, November 2003.
  3. “Advantages of BGA for Backplane Connectors”, by Jim Nadolny, DesignCon 2002, TecForum HP-TF4, pp.5.

This column originally appeared in the April 2023 issue of PCB007 Magazine.

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2023

Trouble in Your Tank: Lead-free and the Fabrication Challenge, Part 1

05-22-2023

A thick, high layer count multilayer is one of the hardest printed circuit boards to adapt to lead-free assembly processes. The reason: Multilayers often have through-hole and hand-soldered components and require two or more rework cycles. The higher reflow temperatures and slower wetting of lead-free solders place an enormous strain on the laminate and copper-plated hole barrel. In many cases, the boards cannot be assembled reliably, even with newer, higher thermal performance FR-4s.

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Trouble in Your Tank: Processes to Support IC Substrates and Advanced Packaging, Part 2

03-28-2023

In last month's column, this author framed up the initial challenges for the PWB fabricator to be successful in producing IC substrates to support advanced packaging. In this month’s feature, the author will explore two more areas of processing that fabricators need to master: Imaging/developing, and etching.

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Trouble in Your Tank: Processes to Support IC Substrates, Advanced Packaging—Part 1

03-07-2023

There has been much written and discussed over the last 18 months relating to semiconductor fabrication and the well-founded concerns that the U.S., in particular, has fallen behind in domestic chip manufacturing. In response to this issue, the United States government has enacted the CHIPS for America Act. Funding under this legislation is designed to drive more chip fabrication domestically. While this is all fine and good, once these advanced chips are manufactured, where will they go? As has been said ad nauseum, “Chips don’t float.”

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Trouble in Your Tank: Revisiting the Art and Science of Photoresist Stripping

01-09-2023

As circuits become more compact, circuit lines and the spaces between them are becoming finer. As the distances between these lines decrease, copper over-plating is more likely to have a deleterious effect on photoresist stripping, which can lead to shorts on costly fine-line PCBs. PCB designers, for example, must attempt to squeeze increasingly more amounts of information onto a smaller board. In practical terms, this means that circuits are becoming more compact; circuit lines and the spaces between them are becoming finer. As the distances between these lines decrease, copper overplating is more likely to have a deleterious effect on photoresist stripping.

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2022

Trouble in Your Tank: Success in Photolithography Starts With Surface Preparation

11-09-2022

The photolithography process defines the circuitry on the panel. As one may surmise, the imaging process used in the fabrication of high density and ultra high-density circuity has made significant advances over the last decade—and just in time. With finer lines and spaces as well as more attention to fabrication of printed wiring advanced packaging substrates. However, as is so true of many of the processes in PWB fabrication, up and down stream processes can and will influence what happens in a particular process.

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Trouble in Your Tank: Electrodeposition of Copper, Part 3—Plating Distribution and Throwing Power

10-06-2022

Success in the plating room rests largely on the understanding of and the application of those critical principles that govern the process of electrodeposition, or electroplating as it is often referred. This month, I look at the fundamentals of plating distribution and throwing power, and what that means for the circuit board fabricator. There are many factors that influence the flow of current in the electroplating cell and ultimately the distribution of the metal across the part along with the concept of throwing power.

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Trouble in Your Tank: Electrodeposition of Copper, Part 2

08-15-2022

If one thought that electroless copper and other metallization systems were complex and the deep dark secrets of these systems shrouded in black magic, the discussions on electroplating will seem like brain surgery. In this next series of columns, the intricacies of electrodeposition technology and its function of building up the thickness of copper in the holes and on the surface will be presented in detail. Function of the active ingredients in the copper plating solutions will be presented. Process control limits for the various plating solution components and the effects on deposit integrity will be discussed.

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Trouble in Your Tank: Basic Fundamentals of Acid Copper Electroplating

03-04-2022

Electroplating a printed circuit board is by no means a trivial task. Higher layer counts, smaller diameter vias (through-hole and blind), as well as higher performance material sets contribute to the greater degree of difficulty with today’s technology. So, process engineers pay close attention to the “softer” issues such as cathode current density, solution chemistry (copper sulfate and sulfuric acid concentration), and—sometimes—addition agent control.

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Trouble in Your Tank: Additive, Semi-Additive and Subtractive Fabrication

02-28-2022

It seems the operative word today is additive circuit board manufacturing, or for that matter, additive for everything. It is true that the use of additive manufacturing technology has found its way into different industries. While there may be several advantages to adopting additive technology in various industries, one should take a step back and truly assess where we are today in relation to conventional and advanced printed circuit board technology. It makes sense to understand the differences between fully additive, semi-additive, modified semi-additive (mSAP) and subtractive. In the end there are a number of options available to the fabricator and OEM to achieve high density and ultra-density circuitry to support higher end technologies including IC substrates.

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Trouble in Your Tank: Surface Preparation—The Foundation of the Photoresist Imaging Process

02-02-2022

The photoimaging process is one of the first steps in the PCB fabrication process. In order to ensure that the image of the circuitry conforms as close to the desired design as possible (i.e. lines and spaces), surface preparation of the copper foil surface is one of the most critical success factors. Employing the optimum mix of surface cleaners and microetchants will provide a clean surface with sufficient surface area to promote dry film adhesion. The fabricator has numerous options and should determine the optimum process by accounting for the type of copper foil used as well as the classes of soils to be removed. More on copper foil types in a future column.

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2021

Trouble in Your Tank: Plating Anomalies and Defects, Part 2

12-27-2021

One of the most difficult things about trouble shooting PCB defects is getting to and understanding the root cause of defects. Many of these defects have can have multiple origins. And many may not manifest themselves in the process where the defect occurred. Thus are the perils of jumping to conclusion about the defect. Often this author gets involved in solving technical issues and the engineer at the board fabricator or OEM calls the defect an anomaly. Not really a good idea to go off trivializing the “purported anomaly.” Failure to understand the true genesis of the defect will lead to incorrect remedies to these issues. We will now present some of these defects and the possible remedies.

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Trouble in Your Tank: Via Filling—Continued

10-25-2021

In a previous column, the author presented several options with which to accomplish blind and through-hole via filling. In this edition of “Trouble in Your Tank,” filling blind and through holes with polymeric pastes will be presented.

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Trouble in Your Tank: Case Study—Interconnect Defects and a Few Other Problems

10-07-2021

For this month’s edition, we are taking a slightly different approach—that of presenting an actual case study. However, the basic principles of these columns continue.

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Trouble in Your Tank: Jumping the Technology Curve Collaboration With Your Competition

08-24-2021

Regardless of the industry where one competes, there is constant pressure to develop new products and penetrate new markets. This difficulty is heightened when your company is situated in a high-technology industry such as electronics, which requires continuous investment in equipment, infrastructure, processes and, of course, skilled workers.

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Trouble in Your Tank: A Series of Questions on Price Increases

08-13-2021

Columnist Michael Carano speaks frankly about the current state of price increases in the PCB industry, and what needs to change to stay alive.

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Trouble in Your Tank: Training Your Team and Tools for Success

05-27-2021

Columnists were asked to consider subjects such as optimizing business processes and strategy, process optimization, and training your team. From my view, developing critical thinking skills will help engineers troubleshoot technical issues and bring the issue to quick resolution, as this is certainly a good lead in to training your team.

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Trouble in Your Tank: Plating Anomalies and Defects—Part 2

04-26-2021

One of the most difficult things about trouble shooting PCB defects is getting to and understanding the root cause of defects. Many of these defects have can have multiple origins. And many may not manifest themselves in the process where the defect actually occurred.

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Trouble in Your Tank: Process Defect Anomalies-Part 1—The Case of Etch Resist Attack

03-29-2021

Troubleshooting process related defects is not as simple an exercise as we would like to believe. The printed wiring board fabrication process is a complex set of mechanical and chemical processes containing multiple steps. When even one of the process steps is not in control, end results can be disastrous. For now, the author presents a view of some defects that at first glance the origins are not obvious.

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Trouble In Your Tank: Process Management and Control—Benchmarking Best Practices

02-19-2021

Minimizing defects and improving yields is especially important as the technology is becoming ever so complicated, and additional focus must be placed on yield improvements. This is where process management and control must be front and center.

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Trouble in Your Tank: A Process Engineer’s Guide to Etching Defects-Part 3

01-21-2021

While troubleshooting everyday processing issues, final etching touches on many downstream processes. These include surface preparation, imaging, and copper surface quality. There are concerns with the etching process itself and how process issues and operating parameters impact the circuit formation quality. In this month’s edition of “Trouble in Your Tank,” the subject of etch-outs, undercut, and linewidth reduction will be presented.

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2020

Trouble in Your Tank: A Process Engineer’s Guide to Final Etching, Part 2

12-30-2020

In last month’s column, Michael Carano presented various etching defect causes related to equipment parameters. In this month’s column, he discusses various other causes that lead to etching defects.

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Trouble in Your Tank: A Process Engineer’s Guide to Final Etching, Part 1

11-20-2020

Sure, etching of copper foil has been in existence since before through-holes were mechanically drilled. However, as circuit density has evolved into finer and finer lines and spaces, the mechanical and chemical aspects of etching copper have evolved as well. Michael Carano provides an overview of the inner layer and outer layer etching process, including chemical and mechanical aspects of the process, different chemical formulations involved, and other unique aspects of each.

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Trouble in Your Tank: A Process Engineer’s Guide to Surface Prep and Dry-Film Photoresist Adhesion

10-23-2020

One cannot underestimate the importance of surface preparation of the copper surface and its relationship to dry film adhesion. Michael Carano explains why chemical cleaning methods are favored over mechanical methods as long as copper removal rates are reduced and excessive surface roughness is avoided.

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Trouble in Your Tank: A Process Engineer’s Guide to Interconnect Defects

09-29-2020

For those associated with PCB fabrication, one of the biggest nightmares is often the infamous interconnect defect (ICD). Essentially, an ICD is a separation of the plating from the interconnect foil. In this column, Mike focuses on Type 1 ICD and D-sep.

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Trouble in Your Tank: A Process Engineer’s Guide to Electroless Copper

08-29-2020

Mike Carano highlights electroless copper plating solutions, focusing on a copper formulation based on copper chloride, EDTA, formaldehyde, and sodium hydroxide.

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Trouble in Your Tank: CAF Formation—Correction of Misrepresentation of Origins and Causes

08-11-2020

In Mike Carano's words, "In my April 2020 column in PCB007 Magazine, I incorrectly misrepresented the origins and causes of conductive anode filament (CAF) formation. This follow-up column will provide more insight and depth of knowledge on the CAF failure mode."

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Trouble in Your Tank: A Process Engineer’s Guide to Advanced Troubleshooting, Part 2

07-31-2020

Michael Carano discusses two interesting technical problems: the case of circuit open or etch-out, which will also include circuit width reduction related to undercut, and a defect that relates to extraneous copper remaining on the board. Both issues illustrate the complex nature of PWB troubleshooting and defect analysis.

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Trouble in Your Tank: A Process Engineer’s Guide to Advanced Troubleshooting, Part 1

06-15-2020

Defects may “manifest” or be detected in or after a specific operation within the PCB manufacturing process, but the underlying root cause may have occurred earlier in the process. In this column, Mike Carano focuses on several anomalies that may have their origins in process steps not normally recognized as the root cause of the issue.

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Trouble in Your Tank: Lamination and Delamination

05-15-2020

There are many reasons to get incredibly frustrated and confused when presented with complex issues related to the PCB fabrication process. Mike Carano reviews the concerns with the possibility of multilayer board delamination and the root cause or causes of the defect.

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Trouble in Your Tank: Conductive Anode Filament (CAF) Formation

04-30-2020

Mike Carano explains how there are two additional concerns fabricators must understand and reconcile as the circuit technology continues on the high-density curve along with the plethora of new materials to meet the technological demands: conductive anode filament (CAF) formation and wicking.

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2019

Trouble in Your Tank: Never Stop Learning

12-15-2019

Michael Carano's father always said to him, "You should never stop learning," even when he was 40 years old. This lesson applies to the PCB manufacturing industry as well and is where constant learning and new skills development come into play. Mike introduces a few new things you can learn, both technical and soft skills.

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Trouble in Your Tank: Changes and Concerns Regarding HDI Technology

12-12-2019

One does not have to look too far back to point out some significant changes that have taken place in our industry over the past few years. Processes, materials, equipment, and board designs continue to change. If I were to pick one to focus on for this column, it would be in the ever-increasing trends toward higher circuit density. This relates to finer lines and spaces, smaller diameter blind vias, and even multilevel stacked and staggered vias. All of these changes will continue to place significant pressures on bare PCB fabricators to increase their investment and onboard new and critical skill sets.

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Trouble in Your Tank: Via Hole Filling and Plugging, Part 2

11-15-2019

In my previous column, I presented several options with which to accomplish blind and through-hole via filling. In this edition of “Trouble in Your Tank,” I will discuss filling blind vias and through-holes with polymeric pastes.

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Trouble in Your Tank: Working With Flexible Circuits

10-24-2019

Even though they are a smaller part of the circuit board industry, flex and rigid-flex circuits have been growing in popularity over the last decade, and for good reasons. These circuits are made to be thin, flexible, and durable. However, in addition to the opportunities that come with flex and rigid-flex circuits, there are also challenges. Find out more here.

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Trouble in Your Tank: Via Hole Filling and Plugging, Part 1

09-11-2019

High-density interconnect (HDI) demands that vias that do not contain component leads be plugged with either a polymeric paste or electroplated copper. In this column series, Michael Carano talks about the technology drivers for via filling/plugging in the context of HDI.

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Trouble in Your Tank: Moving Into Microvias, Part 4

08-06-2019

Copper deposit in the vias with electroless copper or alternatives, such as carbon-based direct plate processes to the vias, depends on process control, equipment design, and chemical parameters. When these are not in control, defects arise. In this installment of the column series, Mike Carano will talk about metallization for HDI blind via processing.

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Trouble in Your Tank: OSP Performance—Effect of Film Thickness and Microetch

05-09-2019

Two often overlooked performance attributes for organic solderability preservatives (OSPs) are the organic film thickness and the topography of the copper after microetch. Film thickness up to an extent is critical. However, the copper topography and surface preparation also play a role. Thus, you should not overlook the critical nature of the overall OSP film thickness. Read on.

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Trouble in Your Tank: Moving Into Microvias, Part 3

03-20-2019

If we have learned anything about moving into HDI manufacturing, it is that it takes a great deal of thought and discipline to be successful. Unfortunately, as the following bullet points delineate, all too often, the fabricator underestimates the scope of HDI and what this manufacturing strategy truly entails.

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Trouble in Your Tank: Surface Preparation and Cleaning, Part 3

02-28-2019

Surface preparation and cleaning are essential aspects of metal finishing and PCB fabrication. The PCB fabricator has several processes that fit the broad category of cleaning and surface preparation. However, the organization needs additional studies to enhance the broad portfolio of products for their respective fitness for use in today’s technology.

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Trouble in Your Tank: The Art and Science of Resist Stripping, Part 2

02-12-2019

Yes, there is some art to the resist stripping operation. However, it is more about the science. In a future column, I will present process control methods for resist stripping as well as dive into additional troublesome activities related to the process.

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